Passivation properties of tunnel oxide layer in passivated contact silicon solar cells

钝化 材料科学 氧化物 退火(玻璃) 氧化物薄膜晶体管 图层(电子) 等效氧化层厚度 形成气体 光电子学 复合材料 冶金 电气工程 栅氧化层 薄膜晶体管 电压 工程类 晶体管
作者
Hyunho Kim,Soohyun Bae,Kwang Sun Ji,Soo Min Kim,Jee Woong Yang,Young Moo Lee,Kyung Dong Lee,Seongtak Kim,Yoon Mook Kang,Haeseok Lee,Dong Hwan Kim
出处
期刊:Applied Surface Science [Elsevier]
卷期号:409: 140-148 被引量:50
标识
DOI:10.1016/j.apsusc.2017.02.195
摘要

Passivated contact in advanced high-efficiency silicon solar cells based on the full back surface field (BSF) is reported here in based on the application of a tunnel oxide layer that is less than 2 nm thick. The open-circuit voltage (Voc) was significantly improved via interface passivation due to insertion of the tunnel oxide layer. During oxide layer growth, a transition region, such as a sub-oxide, was observed at a depth of about 0.75 nm in the growth interface between the silicon oxide layer and silicon substrate. The properties of the less than 2 nm thick tunnel oxide layer were primarily affected by the characteristics of the transition region. The passivation characteristics of tunnel oxide layer should depend on the physical properties of the oxide. The interface trap density Dit is an important parameter in passivation and is influenced by the stoichiometry of the oxide which in turn strongly affected by the fabrication and the post annealing conditions. During heat treatment of a-Si:H thin films (for the purpose of crystallization to form doped layers), thin film blistering occurs due to hydrogen effusion on flat substrate surfaces. To minimize this behavior, we seek to control the surface morphology and annealing profile. Also, the passivation quality of passivataed contact structure declined for the sample annealed above 900 °C. This decline was attributed not only to local disruption of the tunnel oxide layer, but also to phosphorus diffusion. The resistivity of the tunnel oxide layer declined precipitously for the sample annealed above 900 °C. On the basis of these, implied Voc over 740 mV was achieved in n-type Si wafer through the control of the oxide stoichiometry via optimizing the annealing conditions.
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