<title>Wafer-level surface-mountable chip size packaging for MEMS and ICs</title>

TRONIC'S Microsystems has developed in collaboration with LETI and ELA Recherche a Chip Size Packaging for MEMS and ICs using standard MST technologies and batch wafer processing. It allows to integrate on a single package the Electro-Mechanical Structure of the circuits, the connections and the encapsulation. After dicing, the device which is a package of its own can be easily handled and directly mounted on a circuit board. The connection pads allows the mounting on a board using standard Surface Mounting Technologies and the reworkability.