Simulation Study of Gate-all-around Nanosheet Devices Based on SOI Structure

Owing to the excellent controllability of the Gate-All-About Nanosheet (GAANS) device, it' s the most promising technology to achieve 3 nm technology node. However, there are few reports on electrical performances of GAANS devices on SOI substrates. In this article, the influences of device structural parameters on electrical characteristics are investigated by TCAD simulations. It's concluded that with the increase of channel thickness and interface trap density, the sub-threshold swing and the peak transconductance increases, owing to the increase in effective channel width and the degradation in carrier mobility at the interface. Nevertheless, SOI substrates are effective in suppressing gate leakage.