范德瓦尔斯力
半导体
兴奋剂
极性(国际关系)
晶体管
材料科学
光电子学
异质结
反铁磁性
纳米技术
逻辑门
缩放比例
场效应晶体管
凝聚态物理
化学物理
物理
化学
电气工程
电压
分子
量子力学
生物化学
细胞
几何学
工程类
数学
作者
Yimeng Guo,Jiangxu Li,Xuepeng Zhan,Chunwen Wang,Min Li,Biao Zhang,Zirui Wang,Yue‐Yang Liu,Kaining Yang,Hai Wang,Wanying Li,Pingfan Gu,Zhaoping Luo,Yingjia Liu,Peitao Liu,Bo Chen,Kenji Watanabe,Takashi Taniguchi,Xing‐Qiu Chen,Chengbing Qin
出处
期刊:Nature
[Nature Portfolio]
日期:2024-05-29
卷期号:630 (8016): 346-352
被引量:30
标识
DOI:10.1038/s41586-024-07438-5
摘要
Abstract Vertical three-dimensional integration of two-dimensional (2D) semiconductors holds great promise, as it offers the possibility to scale up logic layers in the z axis 1–3 . Indeed, vertical complementary field-effect transistors (CFETs) built with such mixed-dimensional heterostructures 4,5 , as well as hetero-2D layers with different carrier types 6–8 , have been demonstrated recently. However, so far, the lack of a controllable doping scheme (especially p-doped WSe 2 (refs. 9–17 ) and MoS 2 (refs. 11,18–28 )) in 2D semiconductors, preferably in a stable and non-destructive manner, has greatly impeded the bottom-up scaling of complementary logic circuitries. Here we show that, by bringing transition metal dichalcogenides, such as MoS 2 , atop a van der Waals (vdW) antiferromagnetic insulator chromium oxychloride (CrOCl), the carrier polarity in MoS 2 can be readily reconfigured from n- to p-type via strong vdW interfacial coupling. The consequential band alignment yields transistors with room-temperature hole mobilities up to approximately 425 cm 2 V −1 s −1 , on/off ratios reaching 10 6 and air-stable performance for over one year. Based on this approach, vertically constructed complementary logic, including inverters with 6 vdW layers, NANDs with 14 vdW layers and SRAMs with 14 vdW layers, are further demonstrated. Our findings of polarity-engineered p- and n-type 2D semiconductor channels with and without vdW intercalation are robust and universal to various materials and thus may throw light on future three-dimensional vertically integrated circuits based on 2D logic gates.
科研通智能强力驱动
Strongly Powered by AbleSci AI