LDPC Code with Fractal Decoder Device for 100 Gbps PAM-M Optical Interconnect

Modern telecommunication systems must meet the requirements for high-speed performance, low latency, reliable transfer, processing, and information storage. In line with this, the design of the optical communication systems, e.g., data center interconnects (DCI), requires high reliability of data transmission, low latency, and low overhead. It is well known that powerful forward error correction (FEC) codes with artificial redundantly being used in optical networks have several disadvantages, e.g., high-power consumption and high delays in decoder implementation. In this paper, we use an indivisible error detection code to solve these challenges, which we realized in a field-programmable gate array (FPGA) with FEC code based on the low-density parity-check (LDPC) code. Encoding and decoding methods based on the Indivisible codes are relatively less complex and capable of executing end-to-end (E2E) data control. We integrated concatenated codes into the 100 Gbps multilevel pulse amplitude (PAM-M) with Gray code mapping direct detection wavelength division multiplexed (WDM) with standard single-mode fiber (SSMF) and erbium-doped fiber amplifier (EDFA). EDFA uses for signal amplification and to investigate the code performance in the presence of ASE noise. In current conditions, strong candidates for increasing traffic are PAM-M modulation formats (e.g., PAM-4 and PAM-8) since it possesses cost-effectiveness, simplicity, spectral, and energy efficiency. We have investigated the multichannel WDM system anchored to 193.1 THz (optical C-band) central frequency, the per-channel bitrate of 100 Gbps, channel spacing of 100 GHz and EDFA with a noise Figure of 3 dB. The LDPC FEC codes are simulated with code rates $R_{c} \in\{2 / 5,3 / 4,3 / 5,4 / 5\}$ from the digital video broadcasting by satellite – second-generation (DVB-S2) standard.