Performance investigation of experimentally fabricated lead iodide perovskite solar cell via numerical analysis

材料科学 太阳能电池 光伏系统 光电子学 钙钛矿(结构) 图层(电子) 薄脆饼 锌黄锡矿 钙钛矿太阳能电池 纳米技术 捷克先令 电气工程 化学工程 工程类
作者
Yousaf Hameed Khattak,Erika Vega,Faisal Baig,Bernabé Marí Soucase
出处
期刊:Materials Research Bulletin [Elsevier BV]
卷期号:151: 111802-111802 被引量:17
标识
DOI:10.1016/j.materresbull.2022.111802
摘要

A fabricated perovskite solar cell structure Spiro−OMeTAD/MAPbI3/TiO2 showing a maximum efficiency of 14.7%, employing a cost-effective single-step spin-coating method, with controlled humidity of 35% under ambient conditions, is reported. In the same controlled conditions, eight set of devices with the same structure sequence were fabricated with distinctive performance parameters varying from 10.14% to 14.7%. All devices were fabricated under the same operating conditions and in a controlled humidity environment. To further augment the device performance, the photovoltaic parameters were numerically calculated and equated with experimental values. A detailed analysis was conducted to propose a novel efficient device structure having efficiency of 27.13%. Results were obtained through a stepwise procedure by performing numerical analysis on the experimentally fabricated device. The experimental findings were first replicated in solar cell capacitance simulator software, and validation was carried out by fitting the JV curve of a best fabricated device under the influence of distinct factors such as the active layer and the interface defects. Different compound materials were also applied as an alternative HTL as a substitute of Spiro−OMeTAD in a primary optimized device. Detailed analysis gives CZTSe kesterite as most suitable HTL layer for the lead iodide-based perovskite device. Finally, the appropriate band offset engineering was applied to select the electron transport layer, and the best novel structure CZTSe/MAPbI3/Cd1−xZnxS/FTO was proposed, which can be easily and economically manufactured. The functional parameters taken by the proposed device configuration were PCE, FF, Jsc and Voc set as 27.13%, 88.90%, 26.45mA/cm2, and 1.12 V respectively. The presented concepts and guidelines will perform a significant role and will categorically project feasible fabrication approaches for economical and efficient devices.
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