Dynamic Voltage Stress Sensing Circuits for Screening Out Early Device Reliability Issues in Advanced Technology Nodes

Reliability issues of the product in advanced technology node are more and more important. In similar point of views, voltage stress test is widely used to screen out the unexpected early defects and enforce the quality of the products. Voltage stress conditions are usually applied to product test in two ways. One is electrical voltage stress (EVS) in static mode and the other is dynamic voltage stress (DVS) in transient mode. EVS test is useful to evaluate early reliability issue of non-stacked transistor structure such as inverter or buffer circuit, but DVS test can monitor the weak point of all circuit structures because DVS condition is applied at the real chip operation status. Despite the effectiveness of DVS test, most evaluation methods focus mainly on reliability itself of device such as TDDB, BTI and HCI [1]–[3] which are related to EVS test. In addition, DVS test can be applicable to sense the process variation of critical layers or weak layout patterns of product. It is essential to screen out early potential defects of products at electrical die sorting (EDS) step through DVS testing.