Analysis of Substrate Current and HCI Phenomena in High Voltage NMOSFET

An unusual substrate current (Isub) and corresponding hot-carrier injection (HCI) degradation of our 18 V nMOS are studied. There is only one maximal Isub for a standard transistor, but for HV nMOS, an abnormal increase of Isub at high gate voltage (Vg) is observed in the Isub-Vg curves with drain voltage (Vd) fixed at 18V. At Vg=4V, Isub exhibits a conventional peak in a standard device and this was already explained before. However, abnormal Isub increases monotonically with increasing Vg and is comparable to the first peak at Vg=Vd=Vdd. By excluding leakage currents including GIDL, pn junction and tunneling current, we explain the two peaks with simulation. The location of the second peak ionization rate is found to shift to the edge of NGRD (N-type graded drain) near N-plus region. It is attributed to the high resistance and dose abruptness of NGRD. Isub shows an exponential dependence of Vg, not as a function of 1/Vg conventionally. The degradation of drain saturation current (Idsat) and interface trap density (Nit) are plotted as a function of time to investigate the evolutions of nMOS HCI stressed at Vg=4V, Vd=18V and Vg=Vd=18V. Nit is predominant for the degradation for the first Isub peak stress condition, while hole injection is responsible for the degradation at Vg=Vd so that Idsat increases