5G NR Primary Synchronization Signal Detection with Low Hardware Resource Occupancy

In this paper, an optimization algorithm based on field programmable gate array (FPGA) for 5G new radio (NR) downlink primary synchronization signal (PSS) detection is proposed. In 5G NR, the length of PSS is twice of that of long term evolution (LTE), which doubles the complexity of PSS detection. The calculation of the correlation coefficient requires a large number of complex multipliers, which increases resource consumption significantly. We use the feature of NR synchronization signal (NR-SS) to reduce the number of multipliers, and then transform the multiplication into shift by a preprocessing method, which reduces the complexity of the FPGA implementation. The results using MATLAB and Xilinx Vivado show that the hardware resource occupation rate of the proposed algorithm is about half of traditional algorithm.