材料科学
氧化物
栅氧化层
随时间变化的栅氧化层击穿
撞击电离
光电子学
MOSFET
阈值电压
等效氧化层厚度
电离
击穿电压
电子
作者
Min Huang,P. T. Lai,Z.J. Ma,Hei Wong,Yung-Chi Cheng
标识
DOI:10.1016/0038-1101(93)90196-w
摘要
Abstract This work extensively examines gate-oxide breakdown behaviours of n -MOSFETs by means of enhancement-type and depletion-type devices with various channel dimensions under different operation conditions. The results indicate that positive-charge accumulation in gate oxide is only one of the processes occurring during high-field stress but is not the main cause for gate-oxide breakdown. The accelerated gate-oxide breakdown in MOSFETs is initiated by interface states at the Si-SiO 2 interface, which are generated from the following process: holes created by impact ionization in the deep-depletion layer of the drain are injected into the gate oxide and trapped near the Si-SiO 2 interface; then they recombine with hot electrons crossing the interface. In addition, gate-oxide breakdown at the gate-and-drain overlap may lead to that between gate and source.
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