Lateral Back-to-Back Diode for Low-Capacitance Transient Voltage Suppressor

In this paper, a transient voltage suppressor (TVS) using a native lateral back-to-back diode structure in conventional complementary metal–oxide–semiconductor (CMOS) technology is proposed. The capacitance, direct-current (DC) current–voltage ( I – V ) characteristics, and transmission line pulse (TLP) I – V characteristics of this lateral back-to-back diode are investigated. An optimization guideline for the lateral device is presented. The lateral structure is also suitable for the advanced wafer-level chip-scale package (WL-CSP) technology to meet the low capacitance and small footprint requirement for high-frequency or handheld device applications. This is a simple solution for a low-capacitance and low breakdown-voltage protection device against electrostatic discharge and electrical overstress in discrete or on-chip applications.