相位噪声
直接数字合成器
电子工程
噪音(视频)
dBc公司
噪声地板
分频器
锁相环
计算机科学
频率合成器
电气工程
工程类
物理
噪声测量
声学
降噪
CMOS芯片
图像(数学)
人工智能
作者
Marco Pomponio,Archita Hati,Craig W. Nelson
标识
DOI:10.1109/tim.2023.3346538
摘要
In this article, we present a four-channel direct digital synthesis (DDS) design that operates with a common clock ranging from 500 MHz to 24 GHz and generates output frequencies up to 1.75 GHz. A key feature of this board is its custom field-programmable gate array (FPGA)-based synchronization method, which ensures alignment accuracy of 170 ps between the channels, enabling precise frequency and phase relationship settings. In addition, the DDS board incorporates a user-friendly web interface that allows for continuous control and monitoring capabilities over TCP/IP. Multiple synchronized channels can be power-combined to produce a low-phase noise output due to coherent addition of the common carriers and the noncoherent addition of the residual DDS noise. By exploiting these principles and combining eight parallel channels of two DDS boards, we achieve exceptional residual phase noise performance, with
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