发射机
带宽(计算)
现场可编程门阵列
电子工程
千兆位
计算机科学
电气工程
工程类
电信
计算机硬件
频道(广播)
作者
Samuel Santos Pereira,Luís Filipe Almeida,Daniel C. Dinis,Arnaldo S. R. Oliveira,Paulo P. Monteiro,Nuno Borges Carvalho
出处
期刊:IEEE Transactions on Circuits and Systems Ii-express Briefs
[Institute of Electrical and Electronics Engineers]
日期:2023-03-21
卷期号:70 (8): 2844-2848
标识
DOI:10.1109/tcsii.2023.3259482
摘要
This brief presents an all-digital transmitter implemented in a field programmable gate array (FPGA) that surpasses the state of art in terms of carrier frequency agility as well as in bandwidth using a single multi-gigabit transmitter. These figures of merit were achieved through the optimization of the delta-sigma modulator architecture as well as by the utilization of higher-order filters in such modulator. Results show an error vector magnitude (EVM) of around 4% for carrier frequencies in the 2 to 9 GHz range and under 8% in the 1 to 2 GHz and 9 to 12 GHz range using a 1 GHz bandwidth, 16-QAM signal, which would comply with EVM standards under the 5G protocol.
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