晶体管
材料科学
MOSFET
光电子学
场效应晶体管
缩放比例
电气工程
阈值电压
排水诱导屏障降低
栅氧化层
电子线路
纳米技术
电压
工程类
几何学
数学
作者
M. Aditya,K. Srinivasa Rao,B. Balaji,Koushik Guha
出处
期刊:Silicon
[Springer Nature]
日期:2022-01-04
卷期号:14 (14): 8269-8276
被引量:3
标识
DOI:10.1007/s12633-021-01638-8
摘要
For the semiconductor industry, Complementary metal oxide semiconductor is contemplated to be outstanding because of synthesis in Integrated Circuits (ICs). As transistor size is lessened exponentially, there is a rampant increment in the number of transistors on a chip. This potential increase in the number of transistors on a chip is achieved by scaling of Metal oxide semiconductor field-effect transistor (MOSFET). In the traditional MOSFET, with the proper applied gate voltage, the electric field penetrates through the channel with the associated junctions. But as the technology is scaling down, for the proper device operation the concentration in the channel should be high. But with the introduction of Buried oxide and ground plane, the electric field passes through this buried oxide layer but this inturn increases the oxide capacitance. So there is a need for advanced MOSFET structures. With scaling, the attributes of gadgets have also deteriorated. Considerable advanced MOSFETs like Multigate transistors (Double gate, triple gate, Gate all around), Junctionless transistors, and Tunnel FETs are recommended recently. These are expected to promote Moore’s law and scaling of transistors to the next decade and extended enhancement in computer work. A lot of transistors (TFT, Multigate transistors, Junctionless transistors, and TFETs) are investigated dealing with their structure and technology. The attributes of these transistors are also deliberated in this paper.
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