The Simulation of Increasing Robustness of High Voltage Fast Recovery Diode used in VSC-HVDC Equipments

The transition region, which is the transition from the active region of the fast recovery diode chip to the terminal region, is the weakness of the fast recovery diode during reverse recovery and need to be optimized. Especially when used in VSC-HVDC equipments, FRD chips need to be operated at high current change rate. Hence, an optimization scheme for the high resistance zone is proposed in this paper. By setting up three simulation models, the effects of high resistance zone width and doping concentration on reverse recovery performance of FRDs are studied. The high resistance zone structure effectively enhances the toleration of FRD chip to voltage stress, current stress and di/dt stress during reverse recovery. The maximum junction temperature of optimized FRD with high resistance zone increases only 188K, under the condition of 2500 V, 400A, 2500A/µs, which is better than that of conventional FRD. And the RRSOA limit is improved to 2900V, 450A, 3000A/µs. The 3.3kV FRD chips are prepared according to the optimized simulation model. After 12 chips are packaged in parallel, the reverse recovery test of 2800 V, 3200A, 7348A/µs conditions is passed, and the robustness of the FRD device is greatly improved. The actually prepared fast recovery diodes have an outstanding improvement to the reverse recovery safe operation area, and the theoretical simulation and the practical test are unified.