A 10Gb/s 45mW adaptive 60GHz baseband in 65nm CMOS

This paper presents a low-power adaptive 60GHz baseband in 65nm CMOS. The design integrates variable gain amplifiers, analog phase rotator, 40-coefficient I/Q decision feedback equalizers (DFEs), clock generation and data recovery circuits, and adaptation hardware. The baseband achieves 10Gb/s while consuming 53mW (DFE adaptation on)/45mW (DFE adaptation off), representing ∼10X improvement in data-rate and power efficiency over prior art [3],[8].