晶体管
材料科学
平版印刷术
纳米技术
印刷电子产品
数码产品
柔性电子器件
集成电路
可扩展性
堆积
电子线路
可穿戴技术
光电子学
计算机科学
可穿戴计算机
电气工程
嵌入式系统
工程类
物理
电压
数据库
核磁共振
作者
Jung‐Dae Kwon,Yasunori Takeda,Rei Shiwaku,Shizuo Tokito,Kilwon Cho,Sungjune Jung
标识
DOI:10.1038/s41467-018-07904-5
摘要
Abstract Direct printing of thin-film transistors has enormous potential for ubiquitous and lightweight wearable electronic applications. However, advances in printed integrated circuits remain very rare. Here we present a three-dimensional (3D) integration approach to achieve technology scaling in printed transistor density, analogous to Moore’s law driven by lithography, as well as enhancing device performance. To provide a proof of principle for the approach, we demonstrate the scalable 3D integration of dual-gate organic transistors on plastic foil by printing with high yield, uniformity, and year-long stability. In addition, the 3D stacking of three complementary transistors enables us to propose a programmable 3D logic array as a new route to design printed flexible digital circuitry essential for the emerging applications. The 3D monolithic integration strategy demonstrated here is applicable to other emerging printable materials, such as carbon nanotubes, oxide semiconductors and 2D semiconducting materials.
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