作者
Cheng-Ta Ko,Henry Yang,John H. Lau,Saiied M. Aminossadati,Curry Lin,Chieh-Lin Chang,Jhih-Yuan Pan,Hsing-Hui Wu,Iris Xu,Tony Chen,Zhang Li,K. H. Tan,Penny Lo,Rosa Q. So,Y. H. Chen,Nelson Fan,Eric Kuah,Marc Lin,Y.M. Cheung,Eric Ng,Xi Cao,Rozalia Beica,Sze Pei Lim,N. C. Lee,Mian Tao,Jeffery C. C. Lo,S. W. Ricky Lee
摘要
The design, materials, process, and fabrication of a heterogeneous integration of 4 chips by a FOPLP (fan-out panel-level packaging) with chip-first and dies face-down formation are investigated in this study. Emphasis is placed on the application of a new assembly process and materials for fabricating the RDLs (redistribution layers) of the FOPLP. The panel size is 508mm x 508mm. The epoxy molding compound (EMC) is a dry-film material and is molded by lamination method. The minimum metal line width and spacing is 10µm and they are fabricated by printed circuit board (PCB) method and equipment.