Device-Level Thermal Management of Gallium Oxide Field-Effect Transistors

The ultra-wide bandgap (~4.8 eV) and melt-grown substrate availability of β-Ga₂O₃ gives promise to the development of next generation power electronic devices with dramatically improved size, weight, power, and efficiency over current state-of-the-art wide bandgap devices based on 4H-SiC and GaN. Also, with recent advancements made in GHz frequency RF applications, the potential for monolithic or heterogenous integration of RF and power switches has attracted researchers’ attention. Yet, it is expected that Ga₂O₃ devices will suffer from self-heating due to the poor thermal conductivity of the material. Thermoreflectance thermal imaging and infrared thermography were used to understand the thermal characteristics of a MOSFET fabricated via homo-epitaxy. A 3D coupled electro-thermal model was constructed based on the electrical and thermal characterization results. The device model shows that a homo-epitaxial device suffers from an unacceptable junction temperature rise of ~1500°C under a targeted power density of 10 W/mm indicating the importance of employing device level thermal managements to individual Ga₂O₃ transistors. The effectiveness of various active and passive cooling solutions was tested to achieve a goal of reducing the device operating temperature below 200°C at a power density of 10 W/mm. Results show that flip-chip hetero-integration is a viable option to enhance both the steady-state and transient thermal characteristics of Ga₂O₃ devices without sacrificing the intrinsic advantage of high-quality native substrates. Also, it is not an active thermal management solution that entails peripherals requiring additional size and cost implications.