Alternative to ILT method for high-quality full-chip SRAF insertion

A novel approach to Sub-Resolution Assist Feature (SRAF) generation suitable for full-chip production scale applications is discussed in this work. The method enables generation of free-form SRAF insertion guidelines similar to those obtained by solving the inverse lithography problem. The guidelines encompass layout areas where total net effect of an elementary SRAF placement is positive taking into account all neighboring target features. The essence of the method is the assumption that the total impact of placing an elementary SRAF close to several neighboring features can be calculated as a sum of impacts to individual target features, or a simple mathematical function could be used to perform this calculation. Reduction of the SRAF insertion problem to the linear addition of “usefulness” metric on a grid enables the method to be exceptionally computationally efficient. Tests on an aggressive 28nm 100x100 um design contact array clips have confirmed 3+ orders of magnitude faster free-form SRAF generation as compared to commercially available ILT engines.