高动态范围
像素
计算机科学
图像传感器
物理
光子计数
动态范围
光学
探测器
CMOS芯片
计算机视觉
CMOS传感器
点间距
帧速率
单光子雪崩二极管
现场可编程门阵列
人工智能
光子
图像质量
作者
Jun Ogi,Takafumi Takatsuka,Kazuki Hizu,Yutaka Inaoka,Zhu Hongbo,Yasuhisa Tochigi,Yoshiaki Tashiro,Fumiaki Sano,Yusuke Murakawa,Makoto Nakamura,Yusuke Oike
出处
期刊:International Solid-State Circuits Conference
日期:2021-02-13
卷期号:: 113-115
被引量:1
标识
DOI:10.1109/isscc42613.2021.9365977
摘要
Photon-count imaging has been proposed as a promising technology to realize image capture with noiseless readout and high dynamic range (HDR) [1]–[7]. In addition, for industrial and scientific applications, a global shutter exposure with motion artifact suppression is essential. A single-photon avalanche diode (SPAD) image sensor is well matched to the photon-counting architecture by shrinking the SPAD pixel size and stacking a logic chip with pixel-parallel Cu–Cu connections. A pixel-parallel photon counter, however, requires many counter bits in a pixel for HDR operation. This makes it difficult to shrink the pixel size and lower the power consumption, owing to the substantial number of SPAD activations under high light conditions [2]. Inter-frame mode switching between digital photon count and analog accumulation avoids the power increase under high light conditions, but it suffers from a dip in the signal-to-noise ratio (SNR) and/or motion artifact in reproducing an HDR image [3], [4]. An approach reducing SPAD activations under high light conditions can reduce the power consumption [5]–[7], but the combination of long- and short-exposure frames for HDR [5], [6] still suffers from the dip in SNR like conventional multi-exposure image sensors [8], even if these techniques can suppress motion artifacts owing to sub-frame readout.
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