环形振荡器
抖动
随机数生成
NIST公司
随机性
计算机科学
脉冲发生器
伪随机数发生器
随机性试验
现场可编程门阵列
Virtex公司
电子工程
算法
数学
计算机硬件
CMOS芯片
工程类
电信
统计
自然语言处理
作者
Tianming Ni,Qingsong Peng,Jingchang Bian,Liang Yao,Zhengfeng Huang,Aibin Yan,Senling Wang,Xiaoqing Wen
出处
期刊:IEEE Transactions on Circuits and Systems I-regular Papers
[Institute of Electrical and Electronics Engineers]
日期:2023-07-27
卷期号:70 (12): 5074-5085
被引量:6
标识
DOI:10.1109/tcsi.2023.3287162
摘要
The entropy source structure with embedded XOR gates in a ring oscillator (RO) as a true random number generator (TRNG) can improve the speed of accumulating jitter in the oscillator. However, the XOR gate has a certain response time to the input change, and when the input changes too fast, the XOR gate will output short pulses. In this paper, we propose a TRNG design based on a multi-ring convergence oscillator (MRCO) making use of the characteristics of short pulses. We study the output of the XOR gate when facing different inputs. By modeling the time of a fibonacci ring oscillator (FIRO) as an example, we find that the loss of short pulses in an inverter chain is the reason for making the FIRO enter into periodic oscillation. This phenomenon suppresses the accumulation of jitter and occurs periodically in existing structures. Our proposed structure uses independent sub-rings to accumulate jitter, allowing the main-ring to quickly generate short pulses to provide analog randomness. The proposed TRNG design is implemented in Xilinx Virtex-6 FPGA. The experimental results show that it has the highest ratio of throughput rate to hardware resources. The generated random sequence pass both NIST SP800-22 test and NIST SP800-90B test.
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