太赫兹辐射
表面等离子体子
与非门
表面等离子体激元
等离子体子
逻辑门
电子线路
光电子学
与非门逻辑
计算机科学
波导管
干涉测量
和大门
CMOS芯片
物理
电气工程
电子工程
光学
工程类
作者
Xinxin Gao,Bao Jie Chen,Kam‐Man Shum,Qingle Zhang,Qian Ma,Wen Yi Cui,Tie Jun Cui,Chi Hou Chan
标识
DOI:10.1002/admt.202201225
摘要
Abstract Spoof surface plasmon polariton (SSPP) interconnects have great potential for the next‐generation wireless communications and terahertz (THz) integrated circuits. SSPP logic gates are reported to meet the above development requirements. However, the reported SSPP logic gates consist of 3D domino waveguide structure and conversion structure with a funnel‐shaped metasurface; and hence, suffer from the size limit of the compact on‐chip integrations. To explore a more compact and flexible design, a series of logic gates in the planar THz SSPP platform, including OR, AND, XOR, NOT, and NAND gates, is experimentally demonstrated. Owing to the flexible dispersion behaviors, different phase differences between inputs can be controlled by manipulating the SSPP waveguide structure, such as the SSPP Mach–Zehnder interferometer, thereby realizing various THz SSPP logic gates, which will enable powerful potential in large‐scale on‐chip systems, future wireless communications, and intelligent computing.
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