Cell Oxide TDDB (Time Dependent Dielectric Breakdown) in Saddle FinFET

We demonstrated an optimization procedure of cell oxide TDDB (time dependent dielectric breakdown) in saddle FinFET. In planar device, oxide time dependent dielectric breakdown is decided by oxide thickness, oxide quality of ISSG (in-situ steam generation), and growth condition. Compared to the planar transistor, the TDDB in saddle FinFET is decided by two parameters - oxide thickness uniformity and conformity in saddle FinFET recess gate bottom, the saddle FinFET shape. In this study of DRAM, the 4G (four giga) consumer grade cell oxide needs to pass 10 years t0.01% TDDB life time. In our work, the outstanding cell oxide t0.01 % TDDB life time in saddle FinFET was introduced. The pristine sample could sustain 7MV/cm oxide strength and over 10 years t0.01% TDDB life time of 80 K (eighty thousand) memory density, but failed (6.58 years) in 4G memory density. The optimized process of in-situ steam growth (ISSG) improves die-to-die thickness variation, providing better cell oxide breakdown time (MTTF) in the three voltage Weibull distribution, which passes 10 years t0.01% TDDB life time as 4G storage memory. The square shape saddle FinFET provides more uniform threshold voltage 3-sigma variation control and less body-effect than the round shape saddle FinFET. The square shape saddle FinFET provides over 500 years t0.01 % TDDB life time as 4G storage memory.