Simulation-Based Understanding of “Charge-Sharing Phenomenon” Induced by Heavy-Ion Incident on a 65nm Bulk CMOS Memory Circuit

In order to expect the single event occurrence on highly integrated CMOS memory circuit, quantitative evaluation of charge sharing between memory cells is needed. In this study, charge sharing area induced by heavy ion incident is quantitatively calculated by using device-simulation-based method. The validity of this method is experimentally confirmed using the charged heavy ion accelerator.