Modeling of Electromigration Induced Failure Mechanism in Semiconductor Devices

In advance semiconductor devices, most of the reliability issues in interconnect occurs at local scale, more precisely voiding phenomenon in copper lines is one of the key issue. Hence, a better understanding of mechanism governing electromigration would enable development of more accurate predictive models. A model of vacancy migration is proposed. Thermal gradient, stress gradient, concentration gradient and electrical current driven forces are considered. After reviewing some basic elementary behaviors such as Blech length and local vacancy accumulation at the cathode in a two-dimension model, a more realistic configuration is studied thanks to a thre e dimensional copper line model. Distinct diffusion paths (bulk, grain boundary and interface) are implemented in a (111) oriented copper line; it provides a more realistic vacancy kinetics and it highlights large heterogeneity of concentration which may be responsible for void nucleation.