Tom Tong,Hyun-Hee Ryu,Yih Wang,Wen-Hsien Chuang,Jennifer Huening,P. Joshi,Zhenqiang Ma
出处
期刊:Proceedings日期:2018-11-01被引量:14
标识
DOI:10.31399/asm.cp.istfa2018p0345
摘要
Abstract This paper shows for the first time chip level electron beam probing on fully functional 10nm and 14nm node FinFET chips with sub-fin level resolution using techniques developed in house. Three novel electron beam probing techniques were developed and used in the debug and fault isolation of advanced node semiconductor devices. These techniques were E-beam logic state imaging, electron-beam signal image mapping, and E-beam device perturbation. Two tools that can offer all three techniques were constructed and used in production. The techniques have been successfully applied to real case chip debug and fault isolation on advanced 10nm and 14nm FinFET on production tools developed in-house. Sub-fin level resolution was achieved for the first time.