金属有机气相外延
材料科学
光电子学
拓扑(电路)
物理
电气工程
CMOS芯片
纳米技术
外延
计算机科学
图层(电子)
工程类
作者
Quentin Smets,Benjamin Groven,Matty Caymax,Iuliana Radu,Goutham Arutchelvan,Julien Jussot,Devin Verreck,Inge Asselberghs,Ankit Nalin Mehta,Abhinav Gaur,Dennis Lin,Salim El Kazzi
标识
DOI:10.1109/iedm19573.2019.8993650
摘要
We show that downscaling the top-contact length to 13nm induces no penalty on the electrical characteristics for CVD MoS 2 FETs. We demonstrate this for devices with different gate-oxides and operating in both channel and contact-limited regimes, thus confirming carrier injection at the edge of the contact metal. Consequently, we have scaled the device footprint achieving an I on =250μA/μm and excellent SS min =80mV/dec for 50nm SiO 2 and 4nm HfO 2 gate oxides, respectively.
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