SRAF placement with generative adversarial network

As the design layout of integrated circuits (ICs) is continually scaling down, sub-resolution assist features (SRAF) have been extensively used in resolution enhancement technique (RET) applications to enhance lithography printing fidelity and widen the manufacturing process window (PW). With conventional SRAF insertion techniques, rule-based SRAF (RB-SRAF) and model-based SRAF (MB-SRAF) methods have been widely adopted. The typical RB-SRAF is an efficient method to generate SRAFs consistently for simple designs, but cannot be optimized for multiple critical patterns or complex layout schemes. Although MB-SRAF is able to achieve better process window as well as reducing conflicts between placement rules and clean-up rules, many iterations for convergence and extremely high computational costs are required. The explosion of machine learning techniques could facilitate the complex processes of mask optimization, such as SRAF insertion. In this paper, generative adversarial network was studied on a Via layer of advanced 3D NAND flash memory, by training target images and Inverse Lithography Technology (ILT) images of target patterns. GAN models, pix2pix and CycleGAN, were first trained and then utilized to synthesize realistic ILT images. These ILT images were eventually translated to polygons of SRAF with simplification process and mask manufacturing rules check (MRC) constraints. The simulation results demonstrate that CycleGAN approach can place SRAF with comparable performance to mask optimization (MO) result which was optimized by the Tachyon Source-Mask Optimizer (SMO). Most importantly, the efficiency of SRAF insertion can be enhanced significantly through the generative adversarial network.