A Fast-Transient Response Capacitor-Less FVF-LDO in 22-nm CMOS Technology

This paper presents a capacitor-less low-dropout regulator(LDO) based on flipped voltage follower(FVF) structure to achieve fast-transient response and small voltage spikes with a high power-supply ripple rejection (PSRR) performance. This capacitor-less LDO, implemented in 22 nm CMOS technology, is designed for the Internet-of-Things(IoT) application. With a method of adaptive biasing, this LDO can reduce quiescent by tracking load variations and improve the load transient response by tracing the variation of output voltage. Experimental results show that the maximal overshoot and undershoot with adaptive biasing circuit are about 25.06 mV and 38.73 mV, respectively, at the load current toggling between 100 uA and 10 mA with edge time of 300 ns. At the same time, its PSRR can achieve about -60.7 dB at 100 kHz and -41.2 dB at 1 MHz with quiescent current of 11 uA.