隐藏物
计算机科学
缓存污染
缓存算法
缓存着色
智能缓存
缓存失效
页面缓存
x86个
带宽(计算)
并行计算
计算机体系结构
CPU缓存
嵌入式系统
操作系统
计算机网络
软件
作者
John Wuu,Rahul Agarwal,Michael Ciraula,Carl Dietz,Brett C. Johnson,Dave Johnson,Russell Schreiber,Raja Swaminathan,W. Laurens Walker,Samuel Naffziger
标识
DOI:10.1109/isscc42614.2022.9731565
摘要
AMD's V-Cache is a 3D stacked product that attaches additional cache onto a high-performance processor through hybrid bonding, a technology that offers significant bandwidth and power benefits over state-of-the-art uBump based approaches. V-Cache expands Zen3's on-die L3 Cache from 32MB to 96MB, providing up to 2TB/s of bandwidth and 15% average gaming performance uplift. This paper describes the hybrid bonding technology components, provides insight into the V-Cache's architecture and design, discusses the associated DFT implications, and offers measured performance results.
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