Effect of top gate potential on bias-stress for dual gate amorphous indium-gallium-zinc-oxide thin film transistor

We report the abnormal behavior of the threshold voltage (VTH) shift under positive bias Temperature stress (PBTS) and negative bias temperature stress (NBTS) at top/bottom gate in dual gate amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs). It is found that the PBTS at top gate shows negative transfer shift and NBTS shows positive transfer shift for both top and bottom gate sweep. The shift of bottom/top gate sweep is dominated by top gate bias (VTG), while bottom gate bias (VBG) is less effect than VTG. The X-ray photoelectron spectroscopy (XPS) depth profile provides the evidence of In metal diffusion to the top SiO2/a-IGZO and also the existence of large amount of In+ under positive top gate bias around top interfaces, thus negative transfer shift is observed. On the other hand, the formation of OH− at top interfaces under the stress of negative top gate bias shows negative transfer shift. The domination of VTG both on bottom/top gate sweep after PBTS/NBTS is obviously occurred due to thin active layer.