CMOS芯片
赢家通吃
计算机科学
电子线路
计算
模糊逻辑
人工神经网络
实施
逻辑门
并行计算
电子工程
算法
人工智能
工程类
电气工程
程序设计语言
作者
Zeynep Günay,E. Sánchez‐Sinencio
标识
DOI：10.1109/iscas.1997.608514
摘要
Winner-Take-All (WTA) structures are widely used in hardware implementations of neural networks and dedicated fuzzy processors where highly parallelized computations are involved. In this paper, a comparison of previously reported WTA structures is presented. Five structures are simulated and fabricated in a standard 2.0 /spl mu/m n-well double-poly double-metal CMOS process.
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