Matrix-Based Digital Calibration Technique for High-Performance SAR and Pipeline ADCs

A foreground matrix-based digital calibration technique is proposed for high-performance Nyquist analog-to-digital converters (ADCs) to reduce the performance loss due to transistor limitations and unavoidable converter component mismatches. A set of patterns is obtained during foreground calibration and then used during normal operation to correct the ADC output using conventional digital circuitry. This technique is validated through a 12-bit SAR ADC running at 350 MS/s and a test sinusoidal tone at 10 MHz that can be efficiently generated on-chip. The simulation results of the ADC including 2% random capacitive DAC (CDAC) array elements mismatch, employing the proposed calibration methods show 16.4/14.6 dB signal to distortion ratio (SNDR)/ spurious free dynamic range (SFDR) improvement, respectively. Besides, a significant improvement in both differential non-linearity (DNL) and integral non-linearity (INL). The proposed calibration technique is adopted to calibrate a fabricated 13-bit Pipeline ADC that operates at 260 MS/s, which achieves 68.23 dB and 85.82 dB SNDR/SFDR for low frequencies. When measured at 123.129 MHz, the ADC achieves 65.9/80 dB SNDR/SFDR, respectively. The chip was manufactured in TSMC 40-nm CMOS process.