材料科学
电容器
基质(水族馆)
图层(电子)
外延
硅
光电子学
储能
铁电性
缓冲器(光纤)
纳米技术
作者
Fan Zhao,Jing Jin,Guangliang Hu,Chunrui Ma,Lu Lu,Tianyi Hu,Yupeng Liu,Dengwei Hu,Ming Liu,Chun-Lin Jia
标识
DOI:10.1016/j.cej.2022.138312
摘要
• The epitaxial growth of BaZr 0.15 Ti 0.85 O 3 thin films on Si substrate was realized by inserting La 0.67 Sr 0.33 MnO 3 /CeO 2 /YSZ buffer layer. • The energy storage performances can be significantly improved by inserting Graphene/La 0.67 Sr 0.33 MnO 3 /CeO 2 /YSZ buffer layer. • A superior thermal stability in the wide temperature range from -100 °C to 200 °C. With the rapid development of advanced electronic devices towards miniaturization and integration, silicon integrated lead-free ferroelectric film capacitors have attracted extensive attention due to their excellent energy storage performance and fast charge/discharge speed. In this study, the BaZr 0.15 Ti 0.85 O 3 (BZT15) film capacitors have been epitaxially integrated on Si (100) substrate with the buffer layers of Graphene/La 0.67 Sr 0.33 MnO 3 /CeO 2 /Y 2 O 3 -stabilized ZrO 2 (G/L-C-Y). The highly epitaxial crystalline quality improves significantly the energy storage performance. The layer of G has been found to further improve the high temperature energy storage performance due to its heat dissipation effect. The energy storage density ( W re ) of the BZT15 film capacitor with the buffer layers reaches 112.35 J/cm 3 with energy storage efficiency ( η ) of 76.7% at room temperature, which is about 55.29% and 9.18% higher than that of the BZT15 film capacitor without buffer layers, respectively. Moreover, the BZT15 film capacitor with the buffer layer shows an ultra-high W re of 70.36 J/cm 3 and an ultra-high η of 81.22% at 200 ℃, which are 74.55% and 17.13% higher than that of BZT15 film capacitor without buffer layer. More importantly, the fluctuation of W re and η of optimized BZT15 film capacitor is only 8.85% and 1.30% in the wide temperature range from -100 to 200 ℃, respectively. Our studies provide an effective multi-strategy approach combining interface designing and thermal management for the epitaxially integration of dielectric film capacitors on Si substrates to obtain ultra-high energy storage performance in ultra-wide working temperature.
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