材料科学
单晶硅
蚀刻(微加工)
薄脆饼
各向同性腐蚀
钝化
多晶硅
纳米技术
热氧化
硅
微晶
光电子学
冶金
图层(电子)
薄膜晶体管
作者
Caroline Lima Salles,William Nemeth,Harvey Guthrey,Chun‐Sheng Jiang,David L. Young,Sumit Agarwal,Paul Stradins
标识
DOI:10.1002/aenm.202203579
摘要
Abstract Monocrystalline Si ( c ‐Si) solar cells with passivating contacts based on doped polycrystalline Si (poly‐Si) on ≈2.0 nm silicon oxide (SiO x ) require >1000 °C thermal processing to create conducting pinholes in the SiO x layer. However, this high thermal budget can induce bulk defects in the Czochralski c ‐Si wafers used as the cell absorber layer. In this work, it is demonstrated that pinholes can instead be created using metal‐assisted chemical etching on planar or textured morphologies, at room temperature. This wet process creates up to 200 nm wide conducting pinholes that are directly observed with transmission electron and atomic force microscopies. High‐performance hole‐selective poly‐Si/SiN y /SiO x and electron‐selective poly‐Si/SiO x passivating contacts are fabricated and implemented in laboratory‐scale solar cells. This process development significantly broadens the range of passivation layer materials, their thicknesses, and surface morphologies, which enables the design of poly‐Si contacts with superior passivating quality.
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