钝化
物理
拓扑(电路)
计算机科学
材料科学
纳米技术
组合数学
数学
图层(电子)
作者
Wookjin Choi,Young‐Woo Ok,Pradeep Padhamnath,Gabby De Luna,Kwan Hong Min,Rong Zhong,Sagnik Dasgupta,Vijaykumar Upadhyaya,Ajay Upadhyaya,A. Rohatgi
标识
DOI:10.1109/pvsc48320.2023.10359885
摘要
This paper investigated the opportunity and challenge in fabrication of rear junction (RJ) selective double side tunnel oxide passivated contact (DS-TOPCon) cell, featuring full-area p-TOPCon on the back and a selective-area n-TOPCon on the front of n-type c-Si wafer. $2\mathrm{D}$ device simulation showed that this cell structure, which exploits the potential of TOPCon on both sides, possesses the potential to reach cell efficiency higher than 25.0 %, provided that the passivation on front field region between the metal grid can attain a J 0 value of $< 5\text{fA}/\text{cm}^{2}$ . It is shown in this work that $\text{Al}_{2}\mathrm{O}_{3}/\text{SiNx};\mathrm{H}$ passivation stack can achieve J 0 of $\sim 4 \text{fA}/\text{cm}^{2}$ on the front field region. However, the J-V parameters of fabricated selective DS-TOPCon cell showed a significant cell efficiency degradation, presumably due to the formation of inversion layer, which is induced by a negative fixed charge in $\text{Al}_{2}\mathrm{O}_{0}$ layer. This causes minority carrier leakage via tunneling or shunting at the $\mathrm{p}^{+}$ inversion layer on the field region and $\mathrm{n}^{+}$ region under the metal-Si contact. A second passivation scheme, $\text{SiNx};\mathrm{H}$ layer, gave much higher J 0 of $\sim 20\text{fA}/\text{cm}^{2}$ due to poor chemical passivation at the $\text{SiNx};\mathrm{H}/\text{Si}$ interface. Our recent experimental result showed that growth of 15 nm of thermal $\text{SiO}_{2}$ capped with $\text{SiNx};\mathrm{H}$ can achieve the J 0 of $\sim 10\text{fA}/\text{cm}^{2}$ with potential of further improvement.
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