An ILD Void Detection Method for Monolithic 3-D ICs Based on Switched Capacitors

Monolithic 3-D integrated circuits (M3D ICs) have a higher integration and better performance compared to 3-D ICs based on through-silicon vias. However, high integration density and substantial scaling of the interlayer dielectric (ILD) make M3D ICs extremely prone to occur process defects. In fact, defects such as voids often occur in the bonding process of M3D ICs. Therefore, ILD void detection is necessary in order to achieve high yield for M3D ICs. In this article, an ILD void detection method based on switched capacitors is proposed. Since voids affect the equivalent capacitance of logic gates above the ILD, voids can be discovered by measuring the gate-level equivalent capacitance. And the value of the capacitance can reflect severity of the void. The effectiveness and accuracy of the proposed method are verified by HSPICE simulations. For M3D ICs with the 22-nm process, the minimum capacitance variation identified by this method is 3.355 fF under process variation. And this means nanoscale voids can be detected by the proposed method.