A Novel Computing-in-Memory Platform Based on Hybrid Spintronic/CMOS Memory

计算机科学 加法器 CMOS芯片 内存处理 逻辑门 计算机体系结构 操作数 非易失性存储器 并行计算 电子工程 计算机硬件 嵌入式系统 工程类 算法 情报检索 按示例查询 Web搜索查询 搜索引擎
作者
Zhi Zhong Yang,Kuiqing He,Zeqing Zhang,Yao Lu,Zheng Li,Yijiao Wang,Zhaohao Wang,Weisheng Zhao
出处
期刊:IEEE Transactions on Electron Devices [Institute of Electrical and Electronics Engineers]
卷期号:69 (4): 1698-1705 被引量:22
标识
DOI:10.1109/ted.2021.3137761
摘要

Computing-in-memory (CiM) based on spintronic devices is considered to be one of the most promising solutions to address the von Neumann bottleneck. In this article, a novel CiM platform based on hybrid spintronic/CMOS memory is proposed, which can work in memory mode and computing mode. Instead of integrating complex logic units in memory, minor modifications are made to peripheral circuits to perform calculations. Profiting from the unique properties of hybrid memory and well-modified peripheral circuitry, three different computing schemes are introduced, and the computing results are obtained as typical memory readouts. Complex bulk bitwise logic functions including 16 Boolean logic functions and arithmetic operations can be implemented by combining the proposed schemes and dynamically configuring the input variables. All computing functions can be implemented without nonvolatile bit write operations, and there is no restriction on the location of operands. A 1-bit full adder and a multibit ripple carry adder are designed as instances of flexible utilization of the platform. The hybrid spintronic/CMOS simulations at the 40 nm technology node further demonstrate the functionality and performance of this work. The performance of nonvolatile memory write operations is significantly improved and requirements for device fabrication are reduced by exploiting the toggle spin torques mechanism. The resistance margins of our design are twice greater compared to the previous parallel-connected schemes.

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