发射机
电气工程
带宽(计算)
电子线路
计算机科学
宽带
电压
摇摆
电子工程
电信
物理
频道(广播)
工程类
声学
出处
期刊:IEEE Solid-State Circuits Magazine
[Institute of Electrical and Electronics Engineers]
日期:2021-06-29
卷期号:13 (2): 6-15
标识
DOI:10.1109/mssc.2021.3072299
摘要
The transport of high-speed data to and from chips requires input-output (I/O) interfaces with a commensurately wide bandwidth. In addition to the parasitic capacitances that the output driver in a transmitter (TX) and the input stage in a receiver (RX) present to the signal path, both interfaces must also deal with the capacitances associated with electrostatic discharge (ESD) protection devices. The I/O design thus becomes increasingly more challenging as greater speeds are sought. In this article, we design I/O circuits for a data rate of 40 Gb/s with a singleended voltage swing of 0.5 V pp while focusing on the use of T-coils. The reader is referred to [1]-[5] for background information.
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