Cross-Section Tem Sample Preparation for Copper / Low-K Composite Stacks by Ion Milling

Abstract Sample preparation for transmission electron microscopy (TEM) has been a source of speculation with regards to potential for the creation of artifacts which may confound data gleaned from TEM analysis. For semiconductor integrated circuit (IC) materials characterization, the most common sample preparatory methods are based on final thinning by ion beam milling. The latest shift towards Copper / low dielectric constant (k) composite systems in the semiconductor IC industry provides several challenges for TEM sample preparation resulting from differences in milling rates and materials properties for neighboring features. In conjunction with process development for integration of Cu / low-k materials, conducted at SEMATECH, we have systematically studied the effects of TEM sample preparation by ion milling in order to search for artifacts that could result from sample thinning procedures. For this purpose we have studied wafers with patterned copper lines isolated by a low-k polymer. One sample was stressed by thermal and electronic bias, while a second was subjected to only thermal stress.