作者
Nirmal Ramaswamy,Alessandro Calderoni,J. Zahurak,G. Servalli,Ashonita Chavan,Sameer Chhajed,M. Balakrishnan,Mark H. Fischer,Matthew J. Hollander,D. P. Ettisserry,Albert Liao,Kamal Karda,Matthew Jerry,M. Mariani,A. Visconti,Brian R. Cook,Bruce D. Cook,D. Mills,Alessandro Torsi,Chandra Mouli,Erik Byers,Mark Helm,Stanisław Pawłowski,S. Shiratake,N. Chandrasekaran
摘要
We present NVDRAM, the world’s first dual-layer, high-performance, high-density (32Gb) and non-volatile ferroelectric memory technology. NVDRAM uses an ultra-scaled (5.7nm) ferroelectric capacitor as memory cell and a dual gated, stackable, polycrystalline silicon transistor as access device. To achieve high memory density, two memory layers utilizing a 4F 2 architecture with 48nm pitch are fabricated above CMOS circuitry. Full package yield is demonstrated from -40°C to 95°C along with 10yr reliability (endurance and retention). A new component qualification flow based on JEDEC JESD47 that combines both DRAM and NVM tests is successfully implemented. NVDRAM utilizes the LPDDR5 command protocol and system compatibility is successfully demonstrated using a commercial development platform. NVDRAM achieves a bit density of 0.45Gb/mm 2 , higher than Micron’s industry-leading 1β planar DRAM technology.