The stochastic ferroelectric field-effect transistors-based probabilistic-bits: from device physics analysis to invertible logic applications

Abstract A probabilistic-bit (p-bit) is the fundamental building block in the circuit network of probabilistic computing (PC), producing a continuous random bitstream with tunable probability. Among the various p-bit designs, the recently proposed ferroelectric FET (FeFET)-based p-bit is found to possess the advantages of both ultralow hardware cost and CMOS compatibility. In this work, we perform a comprehensive analysis of the stochasticity in ferroelectric material, revealing the mechanisms of domain dynamics and temperature on FE stochasticity. The device-to-device variations of several device/material parameters are then evaluated, affecting the probabilistic-curves to different extents. Furthermore, the integer factorization is performed based on the invertible logic circuits comprising of FE p-bits, aiming to verify its functionality. The accuracy of integer factorization is found to highly depend on FE p-bits’ stochasticity, and various methods have been implemented to optimize its performance, providing unique insights for the future large-scale PC applications.