Ferroelectric Negative Capacitance Field Effect Transistor

Abstract With the progress in silicon circuit miniaturization, lowering power consumption becomes the major objective. Supply voltage scaling in ultralarge‐scale integration (ULSI) is limited by the physical barrier termed “Boltzmann Tyranny.” Moreover, considerable heat is inevitably generated from the ultrahighly integrated circuit. To solve these problems, a ferroelectric negative capacitance field‐effect transistor (Fe‐NCFET) is proposed in order to reduce the subthreshold swing (SS) through internal voltage amplification mechanism, thus effectively scaling the supply voltage and significantly lowering the power dissipation of ULSI. In this Review, representative research results on NCFET are comprehensively reviewed to offer benefits for further study. Here, the background and significance of NCFETs are introduced, and the physical essence of negative capacitance effect is reviewed. Then, physical models and simulation methods of NCFETs are classified and discussed under the consideration of three basic gate structures. Several influencing factors of device performance such as SS, on‐off ratio, and hysteresis, are also theoretically analyzed. Moreover, the experimental results of NCFETs based on different ferroelectric materials are summarized. Finally, with the combination of NC effect and two‐dimentional materials, FinFET, and tunneling FET, respectively, several novel and potential NCFETs are presented, and the outlook of NCFETs is proposed.