德拉姆
支柱
物理
计算机科学
光电子学
工程类
机械工程
作者
Hyun-Woo Chung,Huijung Kim,Hyun-Gi Kim,Kanguk Kim,Sua Kim,Ki-Whan Song,Jiyoung Kim,Yong Chul Oh,Yoo-Sang Hwang,Hyeongsun Hong,Gyoyoung Jin,Chilhee Chung
标识
DOI:10.1109/essderc.2011.6044197
摘要
New 4F 2 cell structure of VPT for the future DRAM devices has been successfully developed by using 30nm process technology. The VPT shows superior current driving capability of 33μA and steep subthreshold slope of 77mV/dec. The VPT device demonstrates excellent retention characteristics in static mode. The floating body effects can be reduced by adopting the gradual junction profile even in a pillar-type channel. Also, the VPT produces about 60% and 30% more gross dies per wafer than conventional 8F 2 and 6F 2 cells.
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