晶体管
超大规模集成
神经形态工程学
互连
集成电路
纳米电子学
计算机科学
电子工程
材料科学
纳米技术
电气工程
工程类
嵌入式系统
光电子学
电信
电压
机器学习
人工神经网络
作者
Saptarshi Das,Amritanand Sebastian,Eric Pop,Connor J. McClellan,Aaron D. Franklin,Tibor Grasser,Theresia Knobloch,Yu. Yu. Illarionov,Ashish Verma Penumatcha,Joerg Appenzeller,Zhihong Chen,Wenjuan Zhu,Inge Asselberghs,Lain‐Jong Li,Uygar E. Avci,Navakanta Bhat,Thomas D. Anthopoulos,Rajendra Singh
标识
DOI:10.1038/s41928-021-00670-1
摘要
Field-effect transistors based on two-dimensional (2D) materials have the potential to be used in very large-scale integration (VLSI) technology, but whether they can be used at the front end of line or at the back end of line through monolithic or heterogeneous integration remains to be determined. To achieve this, multiple challenges must be overcome, including reducing the contact resistance, developing stable and controllable doping schemes, advancing mobility engineering and improving high-κ dielectric integration. The large-area growth of uniform 2D layers is also required to ensure low defect density, low device-to-device variation and clean interfaces. Here we review the development of 2D field-effect transistors for use in future VLSI technologies. We consider the key performance indicators for aggressively scaled 2D transistors and discuss how these should be extracted and reported. We also highlight potential applications of 2D transistors in conventional micro/nanoelectronics, neuromorphic computing, advanced sensing, data storage and future interconnect technologies. This Review examines the development of field-effect transistors based on two-dimensional materials and considers the challenges that need to be addressed for the devices to be incorporated into very large-scale integration (VLSI) technology.
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