材料科学
光电子学
原子层沉积
纳米电子学
纳米技术
电介质
柔性电子器件
晶体管
半导体
泄漏(经济)
数码产品
栅极电介质
CMOS芯片
单层
异质结
电子线路
化学气相沉积
二硒化钨
薄膜
电气工程
电压
生物化学
化学
工程类
经济
宏观经济学
过渡金属
催化作用
作者
Yiyu Zhang,Dasari Venkatakrishnarao,Michel Bosman,Wei Fu,Sarthak Das,Fabio Bussolotti,Rainer Lee,Siew Lang Teo,Ding Huang,Ivan Verzhbitskiy,Zhuojun Jiang,Zhuoling Jiang,Jianwei Chai,Shi Wun Tong,Zi‐En Ooi,Calvin Pei Yu Wong,Yee Sin Ang,Kuan Eng Johnson Goh,Chit Siong Lau
出处
期刊:ACS Nano
[American Chemical Society]
日期:2023-04-06
卷期号:17 (8): 7929-7939
被引量:26
标识
DOI:10.1021/acsnano.3c02128
摘要
Two-dimensional (2D) semiconductors are promising channel materials for continued downscaling of complementary metal-oxide-semiconductor (CMOS) logic circuits. However, their full potential continues to be limited by a lack of scalable high-k dielectrics that can achieve atomically smooth interfaces, small equivalent oxide thicknesses (EOTs), excellent gate control, and low leakage currents. Here, large-area liquid-metal-printed ultrathin Ga2O3 dielectrics for 2D electronics and optoelectronics are reported. The atomically smooth Ga2O3/WS2 interfaces enabled by the conformal nature of liquid metal printing are directly visualized. Atomic layer deposition compatibility with high-k Ga2O3/HfO2 top-gate dielectric stacks on a chemical-vapor-deposition-grown monolayer WS2 is demonstrated, achieving EOTs of ∼1 nm and subthreshold swings down to 84.9 mV/dec. Gate leakage currents are well within requirements for ultrascaled low-power logic circuits. These results show that liquid-metal-printed oxides can bridge a crucial gap in dielectric integration of 2D materials for next-generation nanoelectronics.
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