This article presents a switched-capacitor feedforward technique to enable passive summation in discrete-time (DT) delta-sigma ADCs with only one feedforward capacitor. The proposed technique leads to higher power efficiency and reduced design effort because the amplifier does not carry the input signal thus has a lower output swing, and the power-hungry active adder is avoided. It applies to all kinds of quantizers such as the noise-shaping (NS) SAR, enabling the use of higher order passive NS quantizers for low power applications.