A 3.07 mW 30 MHz-BW 73.2 dB-SNDR Time- Interleaved Noise-Shaping SAR ADC With Self-Coupling Second-Order Error-Feedforward

A noise-shaping successive approximation register (NS-SAR) ADC combines the merits of the $\Delta $ - $\Sigma $ and SAR ADC, transforming it into an emerging ADC architecture to reach high resolution with good power efficiency. The single-channel NS-SAR with high resolution, however, suffers from bandwidth (BW) limitations. The time-interleaved (TI) NS-SAR mitigates the speed bottleneck but faces challenges in obtaining high resolution and BW simultaneously due to the lack of a sharp noise transfer function (NTF). This article presents a calibration-free two-channel TI-NS-SAR with an aggressive second-order NTF for high resolution. Based on a one-time error feedback (FB) at midway, we propose a second-order error-feedforward (FF) to enhance the noise-shaping (NS) effect further meanwhile avoiding the excessive NTF peaking and dynamic range (DR) loss. A dynamic residue amplifier shared between two channels lowers the offset, which reduces the redundant bit to only one bit, thus improving the efficiency of SAR conversion. Fabricated in a 28 nm CMOS with 1 V supply, the prototype achieves 73.2 dB-signal-to-noise-and-distortion-ratio (SNDR) over 30 MHz-BW when operating at 330 MHz. It consumes 3.07 mW and exhibits a Schreier FoM (FoMs) of 173.1 dB.