A new photonic integration technique is presented, which enables the use of indium-phosphide-based membranes on top of silicon chips. This can provide the electronic chips (complementary metal-oxide semiconductor (CMOS)) with an added optical layer (indium-phosphide membrane on silicon (IMOS)) for resolving the communication bottleneck. Very small passive devices have been realised, with performances comparable to other membrane devices (propagation loss 7 dB/cm, negligible bending loss for micron size radii, 3 dB splitter with 0.6 dB excess loss, resonator with Q-factor of 15.500). Also, a new passive device is introduced, a 4.12 micron long polarisation converter which in simulations promises broadband performance and tolerant fabrication. Finally, an active/passive regrowth technique is investigated for submicron active regions within an otherwise mostly passive membrane. A good morphology is obtained around the interfaces between the active and passive regions. The processing involved did not damage the materials severely, so that light emission in micro-PL measurements was found. However, an increasing blue shift with decreasing size occurred, due to quantum well intermixing. Optimising the design and the processing can take care of this. Taken together, the results presented here show that it is feasible to realise extremely small passive and active devices in a photonic circuit in an InP membrane.